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| SMP100LC TrisilTM for telecom equipment protection Features Bidirectional crowbar protection Voltage range from 8 V to 400 V Low capacitance from 20 pF to 45 pF @ 50 V Low leakage current : IR = 2 A max Holding current: IH = 150 mA min Repetitive peak pulse current: IPP = 100 A (10/1000 s) SMB (JEDEC DO-214AA) Main applications Any sensitive equipment requiring protection against lightning strikes and AC power faults. These devices are dedicated to central office protection as they comply with the most stressfull standards. Their Low Capacitances make them suitable for xDSL. Description The SMP100LC is a series of low capacitance transient surge arrestors designed for the protection of high data rate communication equipment. Its low capacitance avoids any distortion of the signal and is compatible with digital transmission line cards (xDSL, ISDN...). SMP100LC series tested and confirmed compatible with Cooper Bussmann Telecom Circuit Protector TCP 1.25A. The SMP100LC-xxx with the fuse TCP1.25A or TCP2A is compliant with Telcordia GR1089 (lightning and AC power fault tests), ITU-T K20/K21 (lightning and AC power fault tests), TIA/EIA-IS-968 (formely FCC Part 68 lightning tests), UL60950 (AC power fault tests). Moreover, the use of the TCP1.25A allows the SMP100LC-xxx to be safe for the 2nd level (B criteria) AC power fault tests. Order Code Order code SMP100LC-xxx Marking See Section 5 on page 11 Benefits Trisils are not subject to ageing and provide a fail safe mode in short circuit for a better protection. They are used to help equipment to meet main standards such as UL60950, IEC950 / CSA C22.2 and UL1459. They have UL94 V0 approved resin. SMB package is JEDEC registered (DO-214AA). Trisils comply with the following standards GR-1089 Core, ITU-T-K20/K21, VDE0433, VDE0878, IEC61000-4-5 and FCC part 68. March 2007 Rev 12 1/12 www.st.com 12 Characteristics SMP100LC 1 Characteristics Table 1. Compliant with the following standards Peak Surge Voltage (V) 2500 1000 5000 1500 6000 1500 8000 15000 4000 2000 4000 2000 4000 4000 1500 800 1000 Required Waveform peak current Voltage (A) 2/10 s 10/1000 s 2/10 s 2/10 s 10/700 s 1/60 ns 10/700 s 1.2/50 s 10/700 s 1.2/50 s 10/160 s 10/560 s 9/720 s 500 100 500 100 150 37.5 Current waveform 2/10 s 10/1000 s 2/10 s 2/10 s 5/310 s Minimum serial resistor to meet standard () 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STANDARD GR-1089 Core First level GR-1089 Core Second level GR-1089 Core Intra-building ITU-T-K20/K21 ITU-T-K20 (IEC61000-4-2) VDE0433 VDE0878 IEC61000-4-5 FCC Part 68, lightning surge type A FCC Part 68, lightning surge type B ESD contact discharge ESD air discharge 100 50 100 50 100 100 200 100 25 5/310 s 1/20 s 5/310 s 8/20 s 10/160 s 10/560 s 5/320 s Table 2. Symbol Absolute ratings (Tamb = 25 C) Parameter 10/1000 s 8/20 s 10/560 s 5/310 s 10/160 s 1/20 s 2/10 s 8/20 s t = 0.2 s t=1s t=2s t = 15 mn t = 16.6 ms t = 20 ms Value 100 400 140 150 200 400 500 5 24 15 12 4 20 21 -55 to 150 150 260 Unit IPP Repetitive peak pulse current (see Figure 1) A IFS ITSM Fail-safe mode : maximum current (1) Non repetitive surge peak on-state current (sinusoidal) I2t value for fusing kA A I2t Tstg Tj TL 1. A2s C C Storage temperature range Maximum junction temperature Maximum lead temperature for soldering during 10 s. in fail safe mode, the device acts as a short circuit 2/12 SMP100LC Table 3. Symbol Rth(j-a) Rth(j-l) Characteristics Thermal Resistances Parameter Junction to ambient (with recommended footprint) Junction to leads Value 100 20 Unit C/W C/W Table 4. Symbol VRM VBR VBO IRM IPP IBO IH VR IR C Electrical Characteristics (Tamb = 25 C) Parameter Stand-off voltage Breakdown voltage Breakover voltage Leakage current Peak pulse current Breakover current Holding current Continuous reverse voltage Leakage current at VR Capacitance IR @ VR (1) max. V 6 22 32 55 81 108 2 126 144 180 207 243 290 325 360 5 A V 8 25 35 65 90 120 140 160 200 230 270 320 360 400 Dynamic Static VBO (2) VBO @ IBO (3) max. V 25 40 55 85 120 155 180 205 255 295 345 400 460 540 max. V 15 35 55 85 125 150 175 200 250 285 335 390 450 530 800 150 max. mA IH (4) min. mA 50 (typ.) C(5) typ. pF NA NA NA 45 40 35 30 30 30 30 30 25 25 20 C(6) typ. pF 75 65 55 90 80 75 65 65 60 60 60 50 50 45 IRM @ VRM Type max. A SMP100LC-8 SMP100LC-25 SMP100LC-35 SMP100LC-65 SMP100LC-90 SMP100LC-120 SMP100LC-140 SMP100LC-160 SMP100LC-200 SMP100LC-230 SMP100LC-270 SMP100LC-320 SMP100LC-360 SMP100LC-400 1. IR measured at VR guarantee VBR min VR 2. See Figure 15: Test circuit 1 for Dynamic IBO and VBO parameters 3. See Figure 16: Test circuit 2 for IBO and VBO parameters 4. See Figure 17: Test circuit 3 for dynamic IH parameter 5. VR = 50 V bias, VRMS =1 V, F = 1 MHz 6. VR = 2V bias, VRMS =1 V, F = 1 MHz 3/12 Characteristics SMP100LC Figure 1. Pulse waveform Figure 2. Non repetitive surge peak on-state current versus overload duration %IPP 100 Repetitive peak pulse current tr = rise time (s) tp = pulse duration time (s) 70 60 50 40 ITSM(A) F=50Hz Tj initial = 25C 50 30 20 10 0 tr tp t t(s) 0 1E-2 1E-1 1E+0 1E+1 1E+2 1E+3 Figure 3. On-state voltage versus on-state current (typical values) Figure 4. Relative variation of holding current versus junction temperature IT(A) 100 Tj initial = 25C IH[Tj] / IH[Tj=25C] 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 VT(V) 10 0 1 2 3 4 5 6 7 8 0.2 0.0 -25 0 25 Tj(C) 50 75 100 125 Figure 5. Relative variation of breakover voltage versus junction temperature Figure 6. Relative variation of leakage current versus junction temperature (typical values) VBO[Tj] / VBO[Tj=25C] 1.08 1.06 1.04 100 2000 1000 IR[Tj] / IR[Tj=25C] 1.02 1.00 0.98 10 Tj(C) 0.96 -25 0 25 50 75 100 125 Tj(C) 1 25 50 75 100 125 4/12 SMP100LC Application information Figure 7. Variation of thermal impedance junction to ambient versus pulse duration (PCB - FR4, SCu = 35m, recommended pad layout) Figure 8. Relative variation of junction capacitance versus reverse voltage applied (typical values) Zth(j-a)/Rth(j-a) 100 1.4 1.2 1.0 0.8 C [VR] / C [VR=2V] F =1MHz VRMS = 1V Tj = 25C 10 0.6 0.4 0.2 tp(s) 1 1E-3 0.0 VR(V) 1E+1 1E+2 5E+2 1 2 5 10 20 50 100 300 1E-2 1E-1 1E+0 2 Application information In wireline applications, analog or digital, both central office and subscriber sides have to be protected. This function is assumed by a combined series / parallel protection stage. Figure 9. Examples of protection stages for line cards Ring relay Protection stage Line Line Ex. Analog line card Ex. xDSL line card or terminal In such a stage, parallel function is assumed by one or several Trisil, and is used to protect against short duration surge (lightning). During this kind of surges the Trisil limits the voltage across the device to be protected at its break over value and then fires. The fuse assumes the series function, and is used to protect the module against long duration or very high current mains disturbances (50/60Hz). It acts by safe circuit opening. Lightning surge and mains disturbance surges are defined by standards like GR1089, FCC part 68, ITU-T K20. Figure 10. Typical circuits Fuse TCP 1.25A Tip L Tip S Fuse TCP 1.25A T1 Protection stage SMP100LC-xxx Gnd Gnd SMP100LC-xxx T2 SMP100LC-xxx Fuse TCP 1.25A Ring L Ring S Typical circuit for subscriber side Typical circuit for central office side 5/12 Application information Figure 11. Test method of the board with fuse and Trisil I surge Surge Generator Line side Test board V Device to be protected SMP100LC Oscilloscope Current probe Voltage probe These topologies, using SMP100LC from ST and TCP1.25A from Cooper Bussmann, have been functionally validated with a Trisil glued on the PCB. Following example was performed with SMP100LC-270 Trisil. For more information, see Application Note AN2064. Figure 12. Trisil turns on during lightning strike I surge (100A/div) V (50V/div) Test conditions: 2/10 s + and - 2.5 and 5 kV, 500 A (10 pulses of each polarity), Tamb = 25 C Test result: Fuse and Trisil OK after test in accordance with GR1089 requirements. 6/12 SMP100LC Figure 13. Trisil action while fuse remains operational Application information I surge (2A/div) V (100V/div) Test conditions: 600 V, 3 A, 1.1 s (first level), Tamb = 25 C Test result: Fuse and Trisil OK after test in accordance with GR1089 requirements. Figure 14. High current AC power test: the fuse acts like a switch by opening the circuit I surge (10A/div) V (100V/div) Test conditions: 277 V, 25 A (second level), Tamb = 25 C Test result: Fuse safely opened and Trisil OK after test in accordance with GR1089 requirements. 7/12 Application information Figure 15. Test circuit 1 for Dynamic IBO and VBO parameters 100 V / s, di /dt < 10 A / s, Ipp = 100 A SMP100LC 2 45 66 470 83 0.36 nF 46 H U 10 F KeyTek 'System 2' generator with PN246I module 1 kV / s, di /dt < 10 A / s, Ipp = 10 A 26 H 250 12 47 46 H U 60 F KeyTek 'System 2' generator with PN246I module Figure 16. Test circuit 2 for IBO and VBO parameters K ton = 20ms R1 = 140 R2 = 240 220V 50Hz Vout DUT VBO measurement 1/4 IBO measurement TEST PROCEDURE Pulse test duration (tp = 20ms): for Bidirectional devices = Switch K is closed for Unidirectional devices = Switch K is open VOUT selection: Device with VBO < 200V VOUT = 250 VRMS, R1 = 140 Device with VBO 200V VOUT = 480 VRMS, R2 = 240 8/12 SMP100LC Figure 17. Test circuit 3 for dynamic IH parameter R Ordering information scheme Surge generator VBAT = - 48 V D.U.T This is a GO-NOGO test which allows to confirm the holding current (IH) level in a functional test circuit. TEST PROCEDURE 1/ Adjust the current level at the IH value by short circuiting the AK of the D.U.T. 2/ Fire the D.U.T. with a surge current IPP = 10A, 10/1000s. 3/ The D.U.T. will come back off-state within 50ms maximum. 3 Ordering information scheme SMP Trisil Surface Mount Repetitive Peak Pulse Current 100 = 100A Capacitance LC = Low Capacitance Voltage 65 = 65V 100 LC - xxx 9/12 Package information SMP100LC 4 Package information Table 5. SMB Dimensions Dimensions Ref. E1 Millimeters Min. Max. 2.45 0.20 2.20 0.40 5.60 4.60 3.95 1.50 Inches Min. 0.075 0.002 0.077 0.006 0.201 0.159 0.130 0.030 Max. 0.096 0.008 0.087 0.016 0.220 0.181 0.156 0.059 D A1 A2 b 1.90 0.05 1.95 0.15 5.10 4.05 3.30 0.75 E c A1 E E1 b C L A2 D L Figure 18. Footprint (dimensions in mm) 1.62 2.60 1.62 2.18 5.84 10/12 SMP100LC Ordering information 5 Ordering information Part Number SMP100LC-8 SMP100LC-25 SMP100LC-35 SMP100LC-65 SMP100LC-90 SMP100LC-120 SMP100LC-140 SMP100LC-160 SMP100LC-200 SMP100LC-230 SMP100LC-270 SMP100LC-320 SMP100LC-360 SMP100LC-400 Marking PL8 L25 L35 L06 L09 L12 L14 SMB L16 L20 L23 L27 L32 L36 L40 0.11 g 2500 Tape & reel Package Weight Base qty Delivery mode 6 Revision history Date 09-Nov-2004 07-Dec-2004 20-Jun-2005 05-Mar-2007 Revision 9 10 11 12 Changes Absolute ratings values, table 3 on page 2, updated. SMP100LC-320, SMP100LC-360 and SMP100LC-400 addition. Telecom Circuit Protector added in Description. Reformatted to current standards. SMB Package information updated. Standards compliance paragraphs added to Description 11/12 SMP100LC Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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